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The FHDL Manual
The Functional Hardware Design Language can be used to create all parts of a digital design. It can be used to design logic-level circuits with ordinary gates, flip-flops and mid-sized functional blocks. It is hierarchical ...
The Functional Hardware Design Language
The Functional Hardware Design Language is an expandable language that is designed to make it easy to specify gate-level. FHDL currently supports the specification of gates, high-level functional blocks, state machines, ...
Using GF(2) matrices in Simulation and Logic Synthesis
GF(2) matrices are matrices of ones and zeros under modulo 2 arithmetic. Like the GF(2) polynomials used in error detection and correction, they have many potential uses in Electronic Design Automation (EDA). Non-singular ...
Using the Connlib Package to Obtain Parsed Netlist Data
The connlib package can be used to obtain parsed netlist data from “.ckt” files. These files must be created using the Functional Hardware Description Language FHDL. This data can be used in any way you choose. The ISCAS85 ...
Deduction by Induction
In this report, I offer a technique for computing power sums that is: intuitive, well-motivated, generalizable to all k, and suitable for presentation to pre-calculus students.
The GF2Matrices Classes: A Programming Package for Mathematical Research
Over the past few years I have been engaged in an intense study of GF(2) matrices, especially of dimensions 2, 3, 4, and 5. The software I used for this study was mostly a bunch of ad-hoc subroutines scattered over numerous ...
Unit Delay Scheduling for the Inversion Algorithm
The Inversion Algorithm is an event driven algorithm whose performance meets or exceeds that of Levelized Compiled Code simulation, even when the activity rate is unrealistically high. Existing implementations of the ...
Two New Techniques for Unit-Delay Compiled Simulation
The PC-set method and the parallel technique are two methods for generating compiled unit-delay simulations of acyclic circuits. The PC-set method analyzes the network, determines the set of potential change times for each ...
Three-Valued Simulation with the Inversion Algorithm
The Inversion Algorithm is an event-driven logic simulation technique that is competitive with Levelized Compiled Code Simulation. Previous versions of the Inversion Algorithm have been limited to purely binary simulation. ...
AN APPLICATION OF GROUP THEORY TO THE ANALYSIS OF SYMMETRIC GATES
A method for determining the symmetries of the inputs of a logic gate either from its truth table or from facts obtained by inspection of its circuit is presented. The symmetry rule of a gate with n inputs is defined in ...