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dc.contributor.advisorBaylis, Charles Passant, 1979-
dc.creatorRezayat, Sarvin, 1994-
dc.date.accessioned2018-05-30T13:55:48Z
dc.date.available2018-05-30T13:55:48Z
dc.date.created2018-05
dc.date.issued2018-04-27
dc.date.submittedMay 2018
dc.identifier.urihttp://hdl.handle.net/2104/10395
dc.description.abstractDue to the increased demand on the spectrum, radars are in increased stress to participate in dynamic spectrum allocation. Therefore, the next generation radar will be an adaptable cognitive radar. This type of radar will be require reconfigurable circuitry. This paper explores real-time circuit optimization for a cognitive radar test bench. This will include the use of two type of reconfigurable matching networks. The first one is a varactor matching network that is very quick but experiences non-linearity. The other is an evanescent-mode resonant cavity tuner that handles high input power but experiences stability and relatability issues. This thesis tackles strategies to mitigate the non-ideal behavior of these networks. The implementation of frequency agility with circuit optimization is also demonstrated.
dc.format.mimetypeapplication/pdf
dc.language.isoen
dc.subjectCircuit Optimization, Cognitive Radar, Frequency Agility
dc.titleCircuit optimization and frequecny agility for cognitive radar.
dc.typeThesis
dc.rights.accessrightsNo access - Contact librarywebmaster@baylor.edu
dc.type.materialtext
thesis.degree.nameM.S.E.C.E.
thesis.degree.departmentBaylor University. Dept. of Electrical & Computer Engineering.
thesis.degree.grantorBaylor University
thesis.degree.levelMasters
dc.date.updated2018-05-30T13:55:48Z
local.embargo.lift2020-05-01
local.embargo.terms2020-05-01


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