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    Design and automated testing of PCI express interface of proton computed tomography detectors.

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    Date
    2019-04-16
    Author
    Yang, Yu, 1989-
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    Abstract
    Throughout this thesis, I will propose a transmit-received-engine based logic design proposed by this thesis works at the PCI Express Transaction Layer in collaboration with Xilinx 7 Series FPGAs Integrated Block for PCI Express. By automated testing and results evaluation, the new design can speed up the original Ethernet link speed by a factor of 30, At the same time, supports the needs of the new signal peaks in 50 ns. Therefore, two key concerns of the existing Phase-II pCT scanner hardware upgrade can be satisfied.
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    https://hdl.handle.net/2104/10686
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    • Theses/Dissertations - Electrical and Computer Engineering

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    Copyright © Baylor® University All rights reserved. Legal Disclosures.
    Baylor University Waco, Texas 76798 1-800-BAYLOR-U
    Baylor University Libraries | One Bear Place #97148 | Waco, TX 76798-7148 | 254.710.2112 | Contact: libraryquestions@baylor.edu
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    DSpace software copyright © 2002-2016  DuraSpace
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