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Event Driven Simulation without Loops or Conditionals
(2009-11-05)
Event driven simulation normally requires a great deal of computation to perform a multitude of different tasks. The purpose of this paper is to show that none of these computations are necessary. Most computations are ...
The Parallel Technique Software Package
(2009-11-13)
This is the software described in the technical report “Two New Techniques for Unit-Delay Compiled Simulation” available from this archive. This package is part of the FHDL system and must be installed in your FHDL directory.
The Super Symmetric Representations of S4 in GL3(2)
(2013-09-20)
This report gives all conjugacy classes of the super symmetric groups HR3 and VR3
The Class 1 4x4 Faithful Representations of S4 over GF(2)
(2013-09-20)
There are 9 conjugacy classes of faithful representations of S4 in the general linear group of 4x4 matrices over GF(2). This report lists the representations belonging to class 1.
Two New Techniques for Unit-Delay Compiled Simulation
(2009-11-05)
The PC-set method and the parallel technique are two methods for generating compiled unit-delay simulations of acyclic circuits. The PC-set method analyzes the network, determines the set of potential change times for each ...
The Shadow Algorithm Software Package
(2009-11-13)
This is the software described in the technical report “The Shadow Algorithm: …” available from this archive. This package is part of the FHDL system and must be installed in your FHDL directory.
The Class 4 4x4 Faithful Representations of S4 over GF(2)
(2013-09-20)
There are 9 conjugacy classes of faithful representations of S4 in the general linear group of 4x4 matrices over GF(2). This report lists the representations belonging to class 4.
Primitive Polynomials for the Field GF(3): Degree 2 through Degree 11
(2013-09-20)
This report lists the primitive polynomials over GF(3) of degree 2 through 11. These polynomials were generated using a new matrix-based technique I invented.
The Functional Hardware Design Language
(2009-10-28)
The Functional Hardware Design Language is an expandable language that is designed to make it easy to specify gate-level. FHDL currently supports the specification of gates, high-level functional blocks, state machines, ...
Generator Pairs for all 4x4 GF(2) Representations of S4
(2013-09-20)
There are nine conjugacy classes of faithful representations of S4 in the general linear group of 4x4 matrices. This report gives generator matrices for one group in each class. These generator pairs allow each of the ...