This software package implements the simulation algorithm described in the tech report “Using GF(2) matrices in Simulation and Logic Synthesis” found in this archive. (http://hdl.handle.net/2104/5263). This package is part ...

The Inversion Algorithm is an event-driven logic simulation technique that is competitive with Levelized Compiled Code Simulation. Previous versions of the Inversion Algorithm have been limited to purely binary simulation. ...

The Inversion Algorithm is an event-driven algorithm, whose performance rivals or exceeds that of Levelized Compiled code simulation, even at activity rates of 50% or more. The Inversion Algorithm has several unique ...

The Inversion Algorithm is an event driven algorithm whose performance meets or exceeds that of Levelized Compiled Code simulation, even when the activity rate is unrealistically high. Existing implementations of the ...

The Functional Hardware Design Language can be used to create all parts of a digital design. It can be used to design logic-level circuits with ordinary gates, flip-flops and mid-sized functional blocks. It is hierarchical ...

The connlib package can be used to obtain parsed netlist data from “.ckt” files. These files must be created using the Functional Hardware Description Language FHDL. This data can be used in any way you choose. The ISCAS85 ...

This is the software described in the technical report “Two New Techniques for Unit-Delay Compiled Simulation” available from this archive. This package is part of the FHDL system and must be installed in your FHDL directory.

This software is the levelized compiled code simulator for the FHDL system. Given a .ckt file, it will compile the file into a C program that simulates the circuit. The C program will be compiled into an executable by the ...