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    The ISCAS89 Benchmarks in FHDL Format 

    Maurer, Peter M. (2009-11-13)
    The .zip file contains each of the ISCAS89 Benchmarks in FHDL format. Also included is a random vector generator file for each circuit. (For what it’s worth.) The generators are written in the DGL language.
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    The Inversion-Algorithm Software 

    Maurer, Peter M. (2009-11-13)
    The software in this package implements four versions of the Inversion algorithm. Four executable files are produced.These executables are used in much the same way as the FHDL package, but only AND, OR, NAND, NOR, NOT, ...
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    HyperSim 

    Maurer, Peter M. (2009-11-13)
    This software package implements the simulation algorithm described in the tech report “Using GF(2) matrices in Simulation and Logic Synthesis” found in this archive. (http://hdl.handle.net/2104/5263). This package is part ...
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    The FHDL LCC Simulator 

    Maurer, Peter M. (2009-11-13)
    This software is the levelized compiled code simulator for the FHDL system. Given a .ckt file, it will compile the file into a C program that simulates the circuit. The C program will be compiled into an executable by the ...
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    The Functional Hardware Design Language 

    Maurer, Peter M. (2009-10-28)
    The Functional Hardware Design Language is an expandable language that is designed to make it easy to specify gate-level. FHDL currently supports the specification of gates, high-level functional blocks, state machines, ...
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    The PC-Set Method Software Package 

    Maurer, Peter M. (2009-11-13)
    This is the software described in the technical report “Two New Techniques for Unit-Delay Compiled Simulation” available from this archive. This package is part of the FHDL system and must be installed in your FHDL directory.
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    The ISCAS85 Benchmarks in FHDL Format 

    Maurer, Peter M. (2009-11-13)
    The three files that constitute this tech report are ISCAS85.fhdl.zip, ISCAS85.InputVectors.zip, and ISCAS85.VectorGenerators.zip. The first file contains the 10 ISCAS85 benchmarks in FHDL format, plus the smoke-test circuit ...
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    The Parallel Technique Software Package 

    Maurer, Peter M. (2009-11-13)
    This is the software described in the technical report “Two New Techniques for Unit-Delay Compiled Simulation” available from this archive. This package is part of the FHDL system and must be installed in your FHDL directory.
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    The Shadow Algorithm Software Package 

    Maurer, Peter M. (2009-11-13)
    This is the software described in the technical report “The Shadow Algorithm: …” available from this archive. This package is part of the FHDL system and must be installed in your FHDL directory.
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    The Inversion Algorithm for Digital Simulation 

    Maurer, Peter M. (2009-11-05)
    The Inversion Algorithm is an event-driven algorithm, whose performance rivals or exceeds that of Levelized Compiled code simulation, even at activity rates of 50% or more. The Inversion Algorithm has several unique ...
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    Author
    Maurer, Peter M. (18)
    Subject
    Digital Simulation (18)
    Event Driven Simulation (4)Hardware Design Language (3)Benchmarks (2)Compiled Simulation (2)Conjugate Symmetry (2)Inversion Algorithm (2)Combinational Benchmarks (1)Differential Simulation (1)Event-Driven Simulation (1)... View MoreDate Issued2009 (18)Has File(s)Yes (18)

    Copyright © Baylor® University All rights reserved. Legal Disclosures.
    Baylor University Waco, Texas 76798 1-800-BAYLOR-U
    Baylor University Libraries | One Bear Place #97148 | Waco, TX 76798-7148 | 254.710.2112 | Contact: libraryquestions@baylor.edu
    If you find any errors in content, please contact librarywebmaster@baylor.edu
    DSpace software copyright © 2002-2016  DuraSpace
    Contact Us | Send Feedback
    TDL
    Theme by 
    Atmire NV