Design and automated testing of PCI express interface of proton computed tomography detectors.

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dc.contributor.advisorSchubert, Keith Evan.
dc.creatorYang, Yu, 1989-
dc.date.accessioned2019-07-29T14:19:16Z
dc.date.available2019-07-29T14:19:16Z
dc.date.created2019-05
dc.date.issued2019-04-16
dc.date.submittedMay 2019
dc.date.updated2019-07-29T14:19:16Z
dc.description.abstractThroughout this thesis, I will propose a transmit-received-engine based logic design proposed by this thesis works at the PCI Express Transaction Layer in collaboration with Xilinx 7 Series FPGAs Integrated Block for PCI Express. By automated testing and results evaluation, the new design can speed up the original Ethernet link speed by a factor of 30, At the same time, supports the needs of the new signal peaks in 50 ns. Therefore, two key concerns of the existing Phase-II pCT scanner hardware upgrade can be satisfied.
dc.format.mimetypeapplication/pdf
dc.identifier.urihttps://hdl.handle.net/2104/10686
dc.language.isoen
dc.rights.accessrightsWorldwide access
dc.subjectComputer engineering. Tomography detectors. PCI Express Transaction Layer.
dc.titleDesign and automated testing of PCI express interface of proton computed tomography detectors.
dc.typeThesis
dc.type.materialtext
thesis.degree.departmentBaylor University. Dept. of Electrical & Computer Engineering.
thesis.degree.grantorBaylor University
thesis.degree.levelMasters
thesis.degree.nameM.S.E.C.E.

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