The Functional Hardware Design Language

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dc.contributor.authorMaurer, Peter M.
dc.date.accessioned2009-10-28T15:45:08Z
dc.date.available2009-10-28T15:45:08Z
dc.date.issued2009-10-28T15:45:08Z
dc.description.abstractThe Functional Hardware Design Language is an expandable language that is designed to make it easy to specify gate-level. FHDL currently supports the specification of gates, high-level functional blocks, state machines, ROM and PLA contents, and parameterized functional blocks. The language is easily extendable.en
dc.format.extent62835 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/2104/5444
dc.language.isoen_US
dc.licenseGPLen
dc.subjectHardware Design Languageen
dc.subjectDigital Simulationen
dc.titleThe Functional Hardware Design Languageen

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