The FHDL Rom Tools

dc.contributor.authorMaurer, Peter M.
dc.date.accessioned2009-11-13T15:36:00Z
dc.date.available2009-11-13T15:36:00Z
dc.date.issued2009-11-13T15:36:00Z
dc.description.abstractThe FHDL (Functional Hardware Design Language) ROM tools provide a method for specifying, simulating, and automatically laying out ROMs. The primary focus of the ROM tools is on providing powerful methods for specifying microcode. Because the ROM tools were designed to support both VLSI design projects and other course work in hardware design, the ROM language contains many features that allow it to emulate other ROM programming languages. This allows students to complete laboratory exercises using a language that is similar to the one used in their textbook. Once the contents of a ROM have been specified, the ROM can be simulated concurrently with the simulation of the other hardware comprising the design. This allows designs to be debugged before they are fabricated. Once a design has been completely verified, the ROM can be laid out automatically and incorporated into a larger VLSI circuit.en
dc.format.extent44422 bytes
dc.format.extent702733 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/octet-stream
dc.identifier.urihttp://hdl.handle.net/2104/5483
dc.language.isoen_US
dc.licenseGPLen
dc.subjectDigital Simulationen
dc.subjectROM codingen
dc.subjectMicrocodingen
dc.titleThe FHDL Rom Toolsen

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