Evaluating Impulse C and multiple parallelism partitions for a low-cost reconfigurable computing system.

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dc.contributor.advisorDuren, Russell Walker.
dc.contributor.authorLi Shen, Carmen C.
dc.contributor.departmentEngineering.en
dc.contributor.otherBaylor University. Dept. of Electrical and Computer Engineering.en
dc.date.accessioned2009-04-01T12:08:36Z
dc.date.available2009-04-01T12:08:36Z
dc.date.copyright2008-12
dc.date.issued2009-04-01T12:08:36Z
dc.descriptionIncludes bibliographical references (p. 77-79).en
dc.description.abstractImpulse C is a C-to-HDL compiler from Impulse Accelerated Technology that facilitates the introduction of software programmers, mathematicians, and scientists, into the realm of FPGA-based algorithm development for high-speed numerical computation. This thesis evaluates the Impulse C programming language and explores differing levels of parallelism across multiple, homogeneous, FPGA development platforms using the Aurora serial communication scheme. Impulse C and Xilinx IP cores are employed in the numerical computation of a neural network consisting of 27 inputs and 1200 outputs. The artificial neural network is capable of emulating an underwater acoustic environment and has been used to determine characteristic parameters of reflections from the ocean floor. Timing, logic utilization and ease-of-use are metrics used to evaluate Impulse C in the automatic generation of VHDL code for the network test application. Implementations with parallelism at the system level and at the intermediate (loop) level are explored as part of this study.en
dc.description.degreeM.S.E.C.E.en
dc.description.statementofresponsibilityby Carmen C. Li Shen.en
dc.format.extentxi, 79 p. : ill.en
dc.format.extent1642072 bytes
dc.format.extent162484 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/2104/5280
dc.language.isoen_USen
dc.rightsBaylor University theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. Contact librarywebmaster@baylor.edu for inquiries about permission.en
dc.rights.accessrightsWorldwide accessen
dc.subjectCompilers (Computer programs) -- Evaluation.en
dc.subjectC (Computer program language)en
dc.subjectField programmable gate arrays.en
dc.subjectNeural networks (Computer science)en
dc.subjectAdaptive computing systems.en
dc.subjectParallel processing (Electronic computers)en
dc.titleEvaluating Impulse C and multiple parallelism partitions for a low-cost reconfigurable computing system.en
dc.typeThesisen

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